My ICASSP 2013 Schedule
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Paper Detail
| Paper: | .5 | ||
| Session: | VLSI Implementations | ||
| Session Time: | Friday, May 31, 10:30 - 12:30 | ||
| Presentation Time: | Friday, May 31, 11:50 - 12:10 | ||
| Presentation: | Lecture | ||
| Topic: | Design and Implementation of Signal Processing Systems: Low-power signal processing techniques and architectures | ||
| Paper Title: | A SUB-100-MILLIWATT DUAL-CORE HOG ACCELERATOR VLSI FOR REAL-TIME MULTIPLE OBJECT DETECTION | ||
| Authors: | Kenta Takagi; Kobe University | ||
| Kosuke Mizuno; Kobe University | |||
| Shintaro Izumi; Kobe University | |||
| Hiroshi Kawaguchi; Kobe University | |||
| Masahiko Yoshimoto; Kobe University | |||