Technical Program

Paper Detail

Paper:DISPS-P1.12
Session:Design Methods for DSP Systems
Location:Poster Area F
Session Time:Friday, May 31, 08:00 - 10:00
Presentation Time:Friday, May 31, 08:00 - 10:00
Presentation: Poster
Topic: Design and Implementation of Signal Processing Systems: Programmable and reconfigurable DSP architectures
Paper Title: COST-EFFECTIVE SCALABLE QC-LDPC DECODER DESIGNS FOR NON-VOLATILE MEMORY SYSTEMS
Authors: Ming-Han Chung, Yu-Min Lin, Cheng-Zhou Zhan, An-Yeu (Andy) Wu, National Taiwan University, Taiwan