| Paper: | DISPS-P2.2 |
| Session: | DSP Algorithm Implementation in Hardware and Software |
| Location: | Poster Area G |
| Session Time: | Friday, May 31, 08:00 - 10:00 |
| Presentation Time: | Friday, May 31, 08:00 - 10:00 |
| Presentation: |
Poster
|
| Topic: |
Design and Implementation of Signal Processing Systems: DSP algorithm implementation in hardware and software |
| Paper Title: |
4x4/8x8/12x12 Reconfigurable MIMO Detector on Multi-Core DSP Based on Eigen Decomposition of Dataflow Graph |
| Authors: |
Sheng-Hung Wu, National Tsing Hua University, Taiwan; Chien-Yu Kao, Jen-Yuan Hsu, Pang-An Ting, Industrial Technology Research Institute, Taiwan; Gwo-Giun Lee, National Cheng Kung University, Taiwan; Yuan-Hao Huang, National Tsing Hua University, Taiwan |
