Technical Program

Paper Detail

Paper:DISPS-L1.3
Session:VLSI Implementations
Location:Room 121/122
Session Time:Friday, May 31, 10:30 - 12:30
Presentation Time:Friday, May 31, 11:10 - 11:30
Presentation: Lecture
Topic: Design and Implementation of Signal Processing Systems: DSP algorithm implementation in hardware and software
Paper Title: REDUCED-COMPLEXITY BINARY-WEIGHT-CODED ASSOCIATIVE MEMORIES
Authors: Hooman Jarollahi, Naoya Onizawa, Vincent Gripon, Warren J. Gross, McGill University, Canada