| Paper: | DISPS-L1.5 |
| Session: | VLSI Implementations |
| Location: | Room 121/122 |
| Session Time: | Friday, May 31, 10:30 - 12:30 |
| Presentation Time: | Friday, May 31, 11:50 - 12:10 |
| Presentation: |
Lecture
|
| Topic: |
Design and Implementation of Signal Processing Systems: Low-power signal processing techniques and architectures |
| Paper Title: |
A SUB-100-MILLIWATT DUAL-CORE HOG ACCELERATOR VLSI FOR REAL-TIME MULTIPLE OBJECT DETECTION |
| Authors: |
Kenta Takagi, Kosuke Mizuno, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto, Kobe University, Japan |
