Technical Program

Paper Detail

Paper:DISPS-P1.1
Session:Design Methods for DSP Systems
Location:Poster Area F
Session Time:Friday, May 31, 08:00 - 10:00
Presentation Time:Friday, May 31, 08:00 - 10:00
Presentation: Poster
Topic: Design and Implementation of Signal Processing Systems: Algorithm and architecture co-optimization
Paper Title: AN RNS-BASED ARCHITECTURE TARGETING HARDWARE ACCELERATORS FOR MODULAR ARITHMETIC
Authors: Samuel Antao, Leonel Sousa, INESC-ID / Insituto Superior Tecnico - Technical University of Lisbon, Portugal